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Intel EP2S15F484C3N

Name: EP2S15F484C3N
Rating: 4.5 (10 reviews)

FC-FBGA packaged EP2S15F484C3N FPGA, part of the Stratix® II Family with a maximum frequency of 816.99MHz

브랜드: Intel

제조업체부품 #: EP2S15F484C3N

데이터 시트: EP2S15F484C3N 데이터 시트 (PDF)

패키지/케이스: FBGA-484

상품 유형: FPGAs (Field Programmable Gate Array)

RoHS 상태:

재고상태: 9,614 PC, 새로운 원본

Warranty: 1 Year Ovaga Warranty - Find Out More

빠른 견적

다음에 대한 RFQ를 제출해 주십시오. EP2S15F484C3N 또는 우리에게 이메일을 보내: 이메일: [email protected], 12시간 이내에 연락드리겠습니다.

수량^*

이메일^*

담당자 이름^*

회사

주목

EP2S15F484C3N 일반적인 설명

The EP2S15F484C3N is a high-performance FPGA Logic IC that belongs to the renowned Stratix II series. Boasting 342 I/Os and advanced clock management features such as PLL and DLL, this IC offers exceptional versatility and functionality. It operates at a 3.3V I/O supply voltage and can withstand temperatures from 0°C to +85°C, making it suitable for diverse operating environments. With a FBGA logic case style and 484 pins, it is designed for secure and efficient integration into various electronic designs. Furthermore, this product is RoHS compliant, reflecting its adherence to strict environmental standards

특징

15,600 to 179,400 equivalent LEs New and innovative adaptive logic module (ALM), the basic building block of the Stratix II architecture, maximizes performance and resource usage efficiency Up to 9,383,040 RAM bits (1,172,880 bytes) available without reducing logic resources TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters Up to 16 global clocks with 24 clocking resources per device region Clock control blocks support dynamic clock network enable/disable, which allows clock networks to power down to reduce power consumption in user mode Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switchover, real-time PLL reconfiguration, and advanced multiplication and phase shifting Support for numerous single-ended and differential I/O standards High-speed differential I/O support with DPA circuitry for 1-Gbps performance Support for high-speed networking and communications bus standards including Parallel RapidIO, SPI-4 Phase 2 (POS-PHY Level 4), HyperTransport™ technology, and SFI-4 Support for high-speed external memory, including DDR and DDR2 SDRAM, RLDRAM II, QDR II SRAM, and SDR SDRAM Support for multiple intellectual property megafunctions from Altera MegaCore® functions and Altera Megafunction Partners Program (AMPPSM) megafunctions Support for design security using configuration bitstream encryption Support for remote configuration updates

명세서

매개변수	값	매개변수	값
Product Status	Obsolete	Programmabe	Not Verified
Number of LABs/CLBs	780	Number of Logic Elements/Cells	15600
Total RAM Bits	419328	Number of I/O	342
Number of Gates	-	Voltage - Supply	1.15V ~ 1.25V
Mounting Type	Surface Mount	Operating Temperature	0°C ~ 85°C (TJ)
Package / Case	484-BBGA

배송

	배송비	리드타임
DHL	$20.00-$40.00 (0.50 KG)	2-5 날
페덱스	$20.00-$40.00 (0.50 KG)	2-5 날
UPS	$20.00-$40.00 (0.50 KG)	2-5 날
TNT	$20.00-$40.00 (0.50 KG)	2-5 날
EMS	$20.00-$40.00 (0.50 KG)	2-5 날
등기 항공 우편	$20.00-$40.00 (0.50 KG)	2-5 날

처리 시간: 배송비는 지역 및 국가에 따라 다릅니다.

지불

지불 조건		핸드 수수료
	은행 송금	US$30.00의 은행 수수료를 부과합니다.
	페이팔	4.0%의 서비스 수수료를 부과합니다.
	신용 카드	3.5% 서비스 수수료를 부과합니다.
	웨스턴 유니언	charge US.00 banking fee.
	돈 그램	US$0.00의 은행 수수료를 부과합니다.

보증

1. 귀하가 구입한 전자 부품에는 365일 보증이 포함되어 있으며, 우리는 제품 품질을 보장합니다.

2. 귀하가 받은 품목 중 일부가 완벽한 품질이 아닌 경우, 당사는 책임 있게 귀하의 환불 또는 교체를 준비할 것입니다. 그러나 품목은 원래 상태를 유지해야 합니다.

포장

단계1 :제품
단계2 :진공 포장
단계3 :정전기 방지 가방
단계4 :개별 포장
단계5 :포장 상자
단계6 :바코드 배송 태그

모든 제품은 정전기 방지 가방에 포장됩니다. ESD 정전기 방지 보호 장치와 함께 배송됩니다.

외부 ESD 포장 라벨은 당사 정보(부품 번호, 브랜드 및 수량)를 사용합니다.

우리는 선적 전에 모든 상품을 검사하고, 모든 제품이 양호한 상태인지 확인하고, 부품이 새로운 원본 일치 데이터시트인지 확인합니다.

모든 상품을 포장한 후 문제가 없는지 확인한 후 안전하게 포장하여 글로벌 특급으로 보내드립니다. 우수한 밀봉 무결성과 함께 탁월한 천공 및 인열 저항성을 나타냅니다.

부품 포인트

The EP2S15F484C3N chip is a field-programmable gate array (FPGA) designed by Altera. It belongs to the Stratix II family and is manufactured using a 90nm process. With 15,408 logic elements, 588 embedded multipliers, and 1.4 Mbits of SRAM, this chip is versatile and powerful. It is widely used in various applications, including telecommunications, aerospace, and industrial automation.
Equivalent

The equivalent products of EP2S15F484C3N chip include EP2S15F484C5N and EP2S15F484I5N.
Features

The EP2S15F484C3N is a field programmable gate array (FPGA) from the Stratix II family by Altera. It offers 15,360 logic elements, 552 embedded memory blocks, and 266 I/O pins. It operates at 1.2V and has a maximum frequency of 600 MHz. It is designed for high-performance applications, such as wireless communication and video processing.
Pinout

The EP2S15F484C3N is an FPGA (Field-Programmable Gate Array) device from the Cyclone II series by Intel (formerly Altera). It has a pin count of 484 pins and offers various functions such as logic and memory elements, as well as digital signal processing capabilities.
Manufacturer

The EP2S15F484C3N is manufactured by Altera Corporation. It is an American company specializing in semiconductors and programming solutions. Altera focuses on developing and manufacturing programmable logic devices such as field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs).
Application Field

The EP2S15F484C3N is a field-programmable gate array (FPGA) device. It is commonly used in various application areas such as telecommunications, networking, video and image processing, high-performance computing, industrial automation, and automotive electronics. With its flexibility and reconfigurable nature, it can be used in a wide range of applications that require high-speed data processing and complex digital logic implementation.
Package

The EP2S15F484C3N chip is packaged in a 484-pin FineLine BGA (Ball Grid Array) package. It is in form factor C3N and has a 15mm x 15mm size.