이 웹사이트는 쿠키를 사용합니다. 이 사이트를 이용함으로써 귀하는 쿠키 사용에 동의하게 됩니다. 자세한 내용은 다음을 참조하세요. 개인 정보 정책.

이미지는 참고용입니다. 제품 사양 보기

주문 금액이

$5000

받으세요 $50 할인을 !

TI 84075012A

Name: 84075012A
Brand: Texas Instruments
Rating: 4.8 (10 reviews)

Counter Single 4-Bit Sync Binary UP 20-Pin CLLCC Tube

브랜드: Texas Instruments

제조업체부품 #: 84075012A

데이터 시트: 84075012A 데이터 시트 (PDF)

패키지/케이스: CLLCC

RoHS 상태:

재고상태: 8,546 PC, 새로운 원본

상품 유형: Counters, Dividers

Warranty: 1 Year Ovaga Warranty - Find Out More

가격

*모든 가격은 USD 단위입니다.

수량	단가	추가 가격
1	$42.405	$42.405
200	$16.410	$3282.000
500	$15.834	$7917.000
1000	$15.549	$15549.000

재고: 8,546 PCS

- +

빠른 견적

다음에 대한 RFQ를 제출해 주십시오. 84075012A 또는 우리에게 이메일을 보내: 이메일: [email protected], 12시간 이내에 연락드리겠습니다.

수량^*

이메일^*

담당자 이름^*

회사

주목

84075012A 일반적인 설명

These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The HC161 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.

These counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.

The clear function for the HC161 devices is asynchronous. A low level at the clear (CLR)\ input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, load (LOAD)\, or enable inputs.

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO). Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a high-level pulse while the count is maximum (9 or 15 with Q_A high). This high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK.

These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD\) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times.

특징

Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 14 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Internal Look-Ahead for Fast Counting
Carry Output for n-Bit Cascading
Synchronous Counting
Synchronously Programmable

명세서

매개변수	값	매개변수	값
Mfr	Texas Instruments	Series	*
Package	Bulk	Product Status	Active
Base Product Number	84075012

배송

	배송비	리드타임
DHL	$20.00-$40.00 (0.50 KG)	2-5 날
페덱스	$20.00-$40.00 (0.50 KG)	2-5 날
UPS	$20.00-$40.00 (0.50 KG)	2-5 날
TNT	$20.00-$40.00 (0.50 KG)	2-5 날
EMS	$20.00-$40.00 (0.50 KG)	2-5 날
등기 항공 우편	$20.00-$40.00 (0.50 KG)	2-5 날

처리 시간: 배송비는 지역 및 국가에 따라 다릅니다.

지불

지불 조건		핸드 수수료
	은행 송금	US$30.00의 은행 수수료를 부과합니다.
	페이팔	4.0%의 서비스 수수료를 부과합니다.
	신용 카드	3.5% 서비스 수수료를 부과합니다.
	웨스턴 유니언	charge US.00 banking fee.
	돈 그램	US$0.00의 은행 수수료를 부과합니다.